In semiconductor devices, strained germanium (s-Ge), strained silicon (s-Si), and strained silicon germanium (s-SiGe) layers are very promising as future transistor channel materials. Devices such as metal oxide semiconductor field effect transistors (MOSFETs) using strained substrates have been experimentally demonstrated to exhibit enhanced device performance compared to devices fabricated using conventional (unstrained) silicon substrates. Potential performance improvements include increased device drive current and transconductance, as well as the added ability to scale the operation voltage, without sacrificing circuit speed, in order to reduce power consumption.
In general, formation of strained layers is the result of strain induced in these layers when they are grown on a substrate formed of a crystalline material whose lattice constant is greater or smaller than that of the strained layers. The lattice constant of Ge is about 4.2 percent greater than that of Si, and the lattice constant of a SiGe alloy is linear with respect to its Ge concentration. In one example, the lattice constant of a SiGe alloy containing fifty atomic percent Ge is about 1.02 times greater than the lattice constant of Si.
Overlying the channel material in a MOSFET is a gate dielectric material, and a gate electrode material overlies the gate dielectric material. Current methods for forming dielectric layers, such as the gate dielectric material, typically require high temperature oxidation processes in order to achieve desired electrical properties. Currently, substrate temperatures above 700° C. are required, substrate temperatures of 800° C. or higher are typical. Alternatively, plasma oxidation may be used to form the dielectric layers at lower temperature. However, the present inventors have observed that the above conventional dielectric formation processes result in defects when applied to strained Ge-containing layers.